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Podcast/Video Interviews by Stephen Ibaraki

A Chat with H.-S. Philip Wong: Willard R. and Inez Kerr Bell Professor in the School of Engineering at Stanford University; Founding faculty co-director of the Stanford SystemX Alliance; Director of the Stanford Nanofabrication Facility; Researcher; Leadership positions at major multi-university research centers of the National Science Foundation and the Semiconductor Research Corporation; Contributed to advanced semiconductor device concepts and their implementation in semiconductor technology; His work elucidated the design principles and demonstrated the first nanosheet transistor; Known for his work on carbon nanotube (CNT) electronic; Early proponent of phase change memory and metal oxide resistive switching memory RRAM; Fellow of the IEEE; received the IEEE Electron Devices Society, J.J. Ebers Award; IEEE Andrew S. Grove Award recipient

This week, Stephen Ibaraki has an exclusive interview with H.-S. Philip Wong.

H.-S. Philip WongH.-S. Philip Wong is the Willard R. and Inez Kerr Bell Professor in the School of Engineering at Stanford University. He joined Stanford University as Professor of Electrical Engineering in September, 2004. From 1988 to 2004, he was with the IBM T.J. Watson Research Center, where he did many of the early research works that have led to product technologies.

While on leave from Stanford from 2018 to 2020, Wong was the Vice President of Corporate Research at TSMC, the largest semiconductor foundry in the world. Since 2020, he remains the Chief Scientist of TSMC in a consulting, advisory role. At TSMC, as VP of Corporate Research, he built up a Corporate Research organization in Taiwan and in San Jose, CA, that aims to establish forward-looking technology leadership for TSMC. As Chief Scientist, Wong formulates research directions for TSMC and advises TSMC on matters pertaining to long-term strategy and vision.

At Stanford, Wong's research aims to translate discoveries in science into practical technologies. His present research covers a broad range of topics including carbon electronics, 2D layered materials, wireless implantable biosensors, directed self-assembly, device modeling, brain-inspired computing, non-volatile memory, and monolithic 3D integration. He graduated 48 PhD students, among them 24 are women and minorities. He has been a champion of diversity even before it became an imperative.

Wong has contributed to advanced semiconductor device concepts and their implementation in semiconductor technology in the modern era. His research has contributed to advancements of silicon CMOS scaling, carbon electronics, and non-volatile memory. These achievements span an industrial research and development, and academic career.

To advance silicon CMOS scaling, he pioneered the device concept of using channel geometry and multiple gate electrodes to control short channel effects and enable transistor scaling to nanometer scale for 3-nm node and beyond. His work elucidated the design principles and demonstrated the first nanosheet transistor, thus pointing the way toward continued device scaling beyond what was considered possible with a conventional bulk silicon transistor. This device concept is the basis of modern transistors used in high volume manufacturing such as the FinFET and the nanosheet transistor.

Beyond the realm of Si CMOS, Wong is best known for his work on carbon nanotube (CNT) electronics. From the late '90s through today, his persistent innovations from materials, devices, circuits, to integrated systems, have transformed the carbon nanotube as a model system for studies of low-dimensional physics into an emerging product technology that is also embraced by the world's largest semiconductor foundry. A rich body of research has pushed the envelope of all three axes of performance, scalability, and functional complexity. He co-authored the first device textbook on CNTs towards educating current and future device engineers on carbon nanotechnology. His highly-cited open-source CNT SPICE model has enabled many research around the world. Through the DARPA ERI 3DSoC project (US$ 61M), he and his collaborators translated resistive switching random access memory (RRAM) and carbon nanotube transistor technologies to a commercial foundry.

Wong is an early proponent of phase change memory and metal oxide resistive switching memory RRAM. His students developed the open-source RRAM SPICE model that is used extensively by academia and industry (> 6,000 downloads on nanohub.org). His research group realized the first neuromorphic electronic synapse device based on phase-change memory, a foundational work that is routinely cited as the first work in the rapidly growing field of brain-inspired computing. He pioneered using RRAM for neuromorphic computing, with works ranging from device characterization to neural network system demonstrations. His work on non-volatile memory modeling and phenomenological understanding, scaling, and neural network system demonstration has inspired significant academic and industrial activities and investments. RRAM is now a product technology from several large commercial foundries.

For over 25 years, Wong has taken a leadership role in key conferences in the field of microelectronics: General Chair of the IEDM, sub-committee chair of the ISSCC, IEEE Executive Committee Chair of the Symposia on VLSI Technology and Circuits. He was editor-in-chief of the IEEE Transactions on Nanotechnology.

He has held leadership positions at major multi-university research centers of the National Science Foundation and the Semiconductor Research Corporation. He is the founding faculty co-director of the Stanford SystemX Alliance – an industrial affiliate program with 38 member companies to collaborate on research focused on building systems. He is the Director of the Stanford Nanofabrication Facility – a shared facility for device fabrication on the Stanford campus that serves academic, industrial, and governmental researchers across the U.S. and around the globe, sponsored in part by the National Science Foundation.

He is a Fellow of the IEEE and received the IEEE Electron Devices Society J.J. Ebers Award for "pioneering contributions to the scaling of silicon devices and technology." This is the IEEE Electron Devices Society’s highest honor to "recognize outstanding technical contributions to the field of electron devices that have made a lasting impact." He also received the IEEE Andrew S. Grove Award for "contributions to novel and advanced semiconductor device concepts and their implementation." This is the IEEE Technical Field Award to honor individuals for outstanding contributions to solid-state devices and technology.

Wong received his B.Sc. (Hons), MS, PhD degrees from the University of Hong Kong, State University of New York at Stony Brook, and Lehigh University, respectively. He received an Honorary Doctorate from the Institut Polytechnique de Grenoble, France, and is an Honorary University Fellow of the University of Hong Kong.

Materials for the Media:
Recent talks on video:

Explaining semiconductor technology to the public:

Some time ago, someone posed this question to me: “What comes after the computer chip?” Having spent most of my career on advancing semiconductor technology, which is the physical foundation of the computer chip, I find this question worth thinking about. So I wrote this blog on Slate.

In 2017, I was interviewed by the National Nanotechnology Coordination Office (NNCO) of the White House. I talked about our research in this podcast on nano.gov.

Here is my OpEd on semiconductor technology leadership (Dec 2021):
"Semiconductors: The US should be asking how we can lead," The Hill, December 1, 2021.

"Innovating at Speed and at Scale: A Perspective on Next Generation Infrastructure for Accelerating Semiconductor Technologies," a white paper, March 7, 2022.

"How to develop ever-better computer chips," episode of Stanford Engineering's The Future of Everything, May 25, 2022.

Education video on nanotechnology:

NSF Science Nation video on carbon nanotube nanosystems (produced by the National Science Foundation)

Carbon nanotube technology (funded by the National Science Foundation)

CNT at Stanford: Long, medium, short (funded by the National Science Foundation)

TO WATCH THE VIDEO INTERVIEW, CLICK ON THIS MP4 file link